In a conventional memory subsystem, such as a memory subsystem used for computing, different types of standalone memory, such as dynamic random access memory (DRAM) and flash memory (NAND, NOR), are adopted.
DRAM is a high-throughput and low-cost commodity working memory. DRAM, however, is volatile and has a large power consumption.
Hybrid DRAM (e.g., OneDRAM™) is a variant of DRAM, which is a single DRAM die with two ports for serving two processors (e.g., a modem and an application processor). Similar to conventional DRAM, however, hybrid DRAM is volatile and has a large power consumption.
Flash (NAND, NOR) is a storage memory technology which is nonvolatile and low-cost. But, flash is slow and limited in its endurance. Hybrid flash (e.g., NAND memory with an integrated NOR block) is a variant of flash, which couples NOR's performance advantage with NAND's density advantage. Compared with a working memory like DRAM, however, hybrid flash, however is still much slower and limited in its endurance.
None of the conventional memory technologies can simultaneously serve as a working memory and a nonvolatile storage memory. Accordingly, multiple memory chip solutions are provided in a multi-chip package (MCP) or in a system-in-package (SiP). For example, for mobile systems, it is common to have pseudo-static RAM (PSRAM)-NOR or DRAM-NAND that combines multiple memory chips having unique attributes. Still, MCP and SiP have a higher system cost and a larger form factor than a system using a single memory solution.
For various reasons, such as cost, speed and capacity, known types of memory have generic limitations, so that each serves its unique application. Thus, it would be desirable to provide a low-cost memory that provides the benefits of each of the current memory types but does not have the short comings described above. It is also desirable for such memory to be tunable for speed, power, and density.